STM32?????гIOо

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portd??4led?
?о
int mainvoid
{
init_all_periph;
..
?У???
void init_all_periphvoid
{
rcc_configuration;
..

void rcc_configurationvoid
{
systeminit;
..
дsystem_stm32f10x.c??
void systeminit void
{
/* reset the rcc clock configuration to the default reset statefor debug purpose */
/* set hsion bit */
rcc-cr |= uint32_t0x00000001;
/* reset sw hpre ppre1 ppre2 adcpre and mco bits */
#ifndef stm32f10x_cl
rcc-cfgr &= uint32_t0xf8ff0000;
#else
rcc-cfgr &= uint32_t0xf0ff0000;
#endif /* stm32f10x_cl */
/* reset hseon csson and pllon bits */
rcc-cr &= uint32_t0xfef6ffff;
/* reset hsebyp bit */
rcc-cr &= uint32_t0xfffbffff;
/* reset pllsrc pllxtpre pllmul and usbpre/otgfspre bits */
rcc-cfgr &= uint32_t0xff80ffff;
#ifndef stm32f10x_cl
/* disable all interrupts and clear pending bits */
rcc-cir = 0x009f0000;
#else
/* reset pll2on and pll3on bits */
rcc-cr &= uint32_t0xebffffff;
/* disable all interrupts and clear pending bits */
rcc-cir = 0x00ff0000;
/* reset cfgr2 register */
rcc-cfgr2 = 0x00000000;
#endif /* stm32f10x_cl */
/* configure the system clock frequency hclk pclk2 and pclk1 prescalers */
/* configure the flash latency cycles and enable prefetch buffer */
setsysclock;
}
?????????????оstm32???
???

    ????3???hsi??hsepll??飩rcc_cfgr?еsw?
sw10???л
’1’’0’????? ?????з????????hse?????hsi???????????
00hsi?????
01hse?????
10pll?????
11á
////////////////////////////////////////////////////////////////////
pll??usb?飬????48m??usb??á
?????·??i2s?飻?·ahb?????sdifmscahb?8???????apb1??plk1?tim2~tim7apb2??plk2?tim1~tim8??adc
???stm32f10xо????51avrpic8λ?????о???Щ??????????Щ????????
?У?Щ???
/* reset the rcc clock configuration to the default reset statefor debug purpose */
/* set hsion bit */
rcc-cr |= uint32_t0x00000001;

rcc_cr???hsionbit 0λ
hsion???
’1’?
???????????4-25mhz???λ?’1’?8mhzrc?8mhz????????????λ??
0?8mhz????
1?8mhz??
///////////////////////////////////////////////////////////////////////
/* reset sw hpre ppre1 ppre2 adcpre and mco bits */
#ifndef stm32f10x_cl
rcc-cfgr &= uint32_t0xf8ff0000;

rcc_cfgr?
гmc02:0λadcpre1:0?ppre22:0?ppre12:0?hpre30?sws10?sw1016λ
/*
mco ??’1’?
0xx??
100????sysclk
101?8mhzrc?
110?4-25mhz?
111pll?2?
*/
/* reset hseon csson and pllon bits */
rcc-cr &= uint32_t0xfef6ffff;
pllonhsebyphserdy3λ
/* reset hsebyp bit */
rcc-cr &= uint32_t0xfffbffff;
hsebypλ ///????д
hsebyp??·???’1’·???4-25mhz??￡дλ
0?4-25mhz?·
1?4-25mhz?·
?hseonλλ
/* reset pllsrc pllxtpre pllmul and usbpre/otgfspre bits */
rcc-cfgr &= uint32_t0xff80ffff;
?usbprepllmulpllxtprpllsrc7λ
/* disable all interrupts and clear pending bits */
rcc-cir = 0x009f0000;
////?
setsysclock;
?ú???

 
У?е?
#elif defined sysclk_freq_72mhz
setsysclockto72;
??и??sysclk_preq_**?壬??

???????????????
???ν?趨?72mhz?
static void setsysclockto72void
{
__io uint32_t startupcounter = 0 hsestatus = 0;
/* sysclk hclk pclk2 and pclk1 configuration ---------------------------*/
/* enable hse */
rcc-cr |= uint32_trcc_cr_hseon;
//hse
/* wait till hse is ready and if time out is reached exit */
do
{
hsestatus = rcc-cr & rcc_cr_hserdy;
startupcounter++;
} whilehsestatus == 0 && startupcounter = hsestartup_timeout;
//?hse???и?rcc_cr?еhserdyλbit 17??и?????μ1?hsestartup_timeout??hsestartup_timeoutstm32f10x.hж壬
#define hsestartup_timeout uint16_t0x0500 /* time out for hse start up */
///////////////////////////////////////////////////////////////////////////////////////////////
if rcc-cr & rcc_cr_hserdy = reset
{
hsestatus = uint32_t0x01;
}
else
{
hsestatus = uint32_t0x00;
}
///?жhserdy?λ??hsestatus?
if hsestatus == uint32_t0x01
{
/* enable prefetch buffer */
flash-acr |= flash_acr_prftbe;
/* flash 2 wait state */
flash-acr &= uint32_tuint32_t~flash_acr_latency;
flash-acr |= uint32_tflash_acr_latency_2;
/* hclk = sysclk */
rcc-cfgr |= uint32_trcc_cfgr_hpre_div1;
//?壺 #define rcc_cfgr_hpre_div1 uint32_t0x00000000 /* sysclk not divided */
/* pclk2 = hclk */
rcc-cfgr |= uint32_trcc_cfgr_ppre2_div1;
//?壺#define rcc_cfgr_ppre2_div1 uint32_t0x00000000 /* hclk not divided */
/* pclk1 = hclk */
rcc-cfgr |= uint32_trcc_cfgr_ppre1_div2;
//?壺#define rcc_cfgr_ppre1_div2 uint32_t0x00000400 /* hclk divided by 2 */
#ifdef stm32f10x_cl
……
#else
/* pll configuration pllclk = hse * 9 = 72 mhz */
rcc-cfgr &= uint32_tuint32_t~rcc_cfgr_pllsrc | rcc_cfgr_pllxtpre |
rcc_cfgr_pllmull;
rcc-cfgr |= uint32_trcc_cfgr_pllsrc_hse | rcc_cfgr_pllmull9;
#endif /* stm32f10x_cl */
//趨pll????9??72m??8m???
/* enable pll */
rcc-cr |= rcc_cr_pllon;
/* wait till pll is ready */
whilercc-cr & rcc_cr_pllrdy == 0
{
}
/* select pll as system clock source */
rcc-cfgr &= uint32_tuint32_t~rcc_cfgr_sw;
rcc-cfgr |= uint32_trcc_cfgr_sw_pll;
/* wait till pll is used as system clock source */
while rcc-cfgr & uint32_trcc_cfgr_sws = uint32_t0x08
{
}
}
else
{ /* if hse fails to start-up the application will have wrong clock
configuration. user can add here some code to deal with this error */
/* go to infinite loop */
while 1
{
}
}
}

????
1 ??3
2 ??hsi?????
3 ??????????Щλ??????о????λж???
4 ???pll?Ч????hsi?????
5 hsi??????+/- 1%б??ó????Χ200khz?
????--????кη?
???Ч????л棬??
delay0xaffff;
???????statussec
status:2507 3606995
sec:0.00022749 0.05028982
???36mhz
.
#define sysclk_freq_36mhz 36000000 //?е?
/* #define sysclk_freq_48mhz 48000000 */
/* #define sysclk_freq_56mhz 56000000 */
/*#define sysclk_freq_72mhz 72000000*/ //м?
?У￡
status:2506 3606994
sec:0.00008478 0.10036276
??????棬д??led????

ioо

?о?????
main.cУйi/o??￡
void gpio_configurationvoid
{
gpio_inittypedef gpio_initstructure;
/* configure io connected to ld1 ld2 ld3 and ld4 leds *********************/
gpio_initstructure.gpio_pin = gpio_pin_8 | gpio_pin_9 | gpio_pin_10 | gpio_pin_11;
gpio_initstructure.gpio_mode = gpio_mode_out_pp;
gpio_initstructure.gpio_speed = gpio_speed_50mhz;
gpio_initgpiod &gpio_initstructure;
?д?gpiod?891011ó?趨???趨? 50mhz????п?2mhz??νó??·??gpiod.0gpio.4????5???波?ó??
gpio_initstructure.gpio_pin=gpio_pin_0|gpio_pin_1|gpio_pin_2|gpio_pin_3|gpio_pin_4;
gpio_initstructure.gpio_mode = gpio_mode_in_floating;
gpio_initgpiod &gpio_initstructure;
1к?3??2?gpio_mode_in_floatingstm32f10x_gpio.h??

???gpio_mode_out_pp?2????????
????????
int mainvoid
{
init_all_periph;
while1
{ if gpio_readinputdatabitgpiodgpio_pin_0 //1
{ gpio_resetbitsgpiod gpio_pin_8;
}
else
{ /* turn on ld1 */
gpio_setbitsgpiod gpio_pin_8;
/* insert delay */
}
..
?1?жgpiod.001stm32f10x_gpio.c??
uint8_t gpio_readinputdatabitgpio_typedef* gpiox uint16_t gpio_pin
{
uint8_t bitstatus = 0x00;
/* check the parameters */
assert_paramis_gpio_all_periphgpiox;
assert_paramis_get_gpio_pingpio_pin;
if gpiox-idr & gpio_pin = uint32_tbit_reset
{
bitstatus = uint8_tbit_set;
}
else
{
bitstatus = uint8_tbit_reset;
}
return bitstatus;
}
?к????飩?о???????ж??uint8_tstm32?bit????uint8_t???????uint16_t???????
uint16_t gpio_readinputdatagpio_typedef* gpiox
uint16_t gpio_readoutputdatagpio_typedef* gpiox
Щ?????

?α?????led??д??棬÷дflash???????и?дramram?У

Χ???У???pins 0??У?pin8?????оkeil?????л?棬?t??

• 1
• 2
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